I have had a long standing love and fascination for space and science. After obtaining my B.S. in electrical engineering I came to JPL as a summer intern. I switched to academic part time when I began to pursue my masters degree in Communication/DSP and have since then gone full time.

I attended Cal Poly Pomona from 2003-2007 and obtained my B.S. in Electrical Engineering with a strong emphasis in DSP/Communication. I am continuing my study of DSP/Communication even further at Cal Poly Pomona in order to obtain my masters degree.

I had worked in industry at a Laser Welding/Systems company before arriving at my final destination JPL. I have strong abilities in FPGA programming, object oriented programming, system level design, schematic/PCB design, hardware trouble shooting, and DSP.
Projects Ive worked on have been:
-AEGSE for MSL
-Formation Control Testbed
-Optical Pointing Loop
-ANS

End to end embedded systems, error correction encoding/decoding, FPGA implemented compression algorithms, schematic layout of high speed digital logic and software defined radio.